GPU microarchitecture by AMD
RDNA 4 is a GPU microarchitecture designed by AMD, released with the Radeon RX 9000 series on February 28, 2025.[1]
Navi 4x dies
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Navi 44
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Navi 48
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Launch
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Jun 2025
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Mar 2025
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Codename
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Compute units (Stream processors) [FP32 cores]
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32 (2048) [4096]
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64 (4096) [8192]
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Process
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TSMC N4P
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Transistors
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29.7 bn.
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53.9 bn.
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Transistor density
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149.2 MTr/mm2
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151.1 MTr/mm2
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Die size
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199 mm2
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356.5 mm2
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Products
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Consumer
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Desktop
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- RX 9070 XT
- RX 9070 GRE
- RX 9070
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Mobile
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—
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—
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Workstation
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Desktop
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—
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—
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Mobile
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—
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—
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Products
Gaming
Desktop
Model (Code name)
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Release date & price
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Architecture & fab
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Transistors & die size
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Core
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Fillrate[i][ii][iii]
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Processing power
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Infinity Cache
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Memory
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TBP
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Bus interface
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TFLOPS[i][iv]
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AI TOPS[v]
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Config[vi]
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Clock[i] (MHz)
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Texture (GT/s)
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Pixel (GP/s)
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Half[vii]
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Single
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Double
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INT8
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INT4
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Size
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Bandwidth (GB/s)
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Size
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Bandwidth (GB/s)
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Bus type & width
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Clock (MT/s)
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Radeon RX 9060 (Navi 44)[2]
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Aug 5, 2025 OEM
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RDNA 4 TSMC N4P
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29.7 billion 199 mm2
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1792:112:64:28:56 28 CU
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1700 2990
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190.4 334.9
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108.8 191.4
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24.37 42.84
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12.19 21.43
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0.190 0.335
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97 171
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195 343
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32 MB
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8 GB
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288
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GDDR6 128-bit
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18000
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132 W
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PCIe 5.0 ×16
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Radeon RX 9060 XT (Navi 44)[3][4]
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Jun 5, 2025 $299 USD (8 GB) $349 USD (16 GB)
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2048:128:64:32:64 32 CU
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2530 3130
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323.8 400.6
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161.9 200.3
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41.45 51.28
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20.72 25.64
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0.323 0.400
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166 205
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331 410
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32 MB
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8 GB 16 GB
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320
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20000
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150 W 160 W
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Radeon RX 9070 GRE (Navi 48)[5]
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May, 2025 ¥4119 RMB
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53.9 billion 356.5 mm2
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3072:192:96:48:96 48 CU
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2200 2790
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422.4 535.7
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211.2 267.8
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54.07 68.57
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27.03 34.28
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0.422 0.535
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216 274
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432 548
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48 MB
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12 GB
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432
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GDDR6 192-bit
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18000
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220 W
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Radeon RX 9070 (Navi 48)[6]
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Mar 6, 2025 $549 USD
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3584:224:128:56:112 56 CU
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2070 2520
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463.6 564.4
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265.0 322.6
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59.35 72.25
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29.67 36.12
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0.463 0.564
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237 289
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475 578
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64 MB
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16 GB
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640
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GDDR6 256-bit
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20000
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Radeon RX 9070 XT (Navi 48)[7]
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Mar 6, 2025 $599 USD
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4096:256:128:64:128 64 CU
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2400 2970
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614.4 760.3
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307.2 380.2
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78.64 97.32
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39.32 48.66
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0.614 0.760
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314 389
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629 778
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304 W
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- ^ a b c Boost values (if available) are stated below the base value in italic.
- ^ Texture fillrate is calculated as the number of Texture Mapping Units multiplied by the base (or boost) core clock speed.
- ^ Pixel fillrate is calculated as the number of Render Output Units multiplied by the base (or boost) core clock speed.
- ^ Precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
- ^ Officially declared performance is twice the one shown here due to the use of sparsity.
- ^ Unified shaders : Texture mapping units : Render output units : Ray accelerators : AI accelerators and Compute units (CU)
- ^ Officially declared half-precision performance is twice of the one shown here due to being based on different operation (a×b+c×d+e).
References
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